This invention relates, in general, to semiconductor devices, and more particularly to a semiconductor die having a corner design including topological configurations for delamination resistance.
A semiconductor device in which this invention will typically be used includes a silicon semiconductor die having metal interconnect lines which are covered by passivation glass. The die is mounted on the flag of a leadframe and the die and flag are then encapsulated in plastic at a high temperature. The expansion coefficient of the plastic encapsulant is much larger than that of the silicon die and, therefore, the plastic encapsulant cannot fully contract as it cools. In large packages, deleterious results of this thermal expansion mismatch are especially evident during temperature cycling tests where the temperature extremes often range between -65 and 150 degrees centigrade.
When the plastic encapsulant contracts, large magnitudes of stress act on the silicon semiconductor die. The stress is highest at the edges and corners of the die. The stress causes the plastic encapsulation to crack adjacent to the corner of the semiconductor die. This allows for relative motion between the plastic encapsulant and the semiconductor die which causes the passivation glass of the semiconductor die to crack and break, further causing delamination especially at the high stress corners. It is common for this delamination to travel through the metal interconnect lines and shear them into separate plates. This results in a semiconductor device having a decreased lifetime.
Prior attempts at solving the delamination problem have included voiding the die corners of the semiconductor die of circuitry, interconnects and wire bonds. Although this does not stop the delamination, it increases the lifetime of the semiconductor device because the operational circuitry is further away from the corner regions and is not affected by the initial delamination. The present invention builds upon the prior art and greatly reduces the speed of delamination thereby resulting in an increased semiconductor device lifetime.